Department of Electronics and communication Engineering
Digital System Design


Objective of Lab: To enhance the knowledge and skill of the students in digital system design with emphasis on Hardware Description Language (VHDL HDL)


 About Lab

Digital System Design is for V semester students.  The aim of the DSD lab is to provide experimental platform for the students to code and implement the RTL level design using VHDL language which is part of their core subject. In this lab students implement VHDL programs (experiments as per university prescribed syllabus) for various combinational/sequential circuit examples adders, decoders, encoders, multiplexer, demultipulxer, FFs, counters etc. For this lab the prerequisites are the knowledge of digital electronics which students study in earlier semesters. The methodology of the lab is to explain the theory as well as logic involved in class/lab. Then students code and implement the explained logic according to the stated coding style, during lab hours, individually.

The lab has industry standard HEP1 and HEP2 tools from Mentor Graphics and appreciated by Spartan series FPGA.